The example embodiments of the inventive concepts relate to a semiconductor device included in a sense amplifier, and more particularly, to a semiconductor device configured to perform a mismatch compensation.
Semiconductor memory devices may need to have high capacities and low power while performing high speed operations to satisfy user demand. However, increasing the capacity of the semiconductor memory devices may cause a loading mismatch phenomenon between a bit line and a complementary bit line, which are connected to a sense amplifier, or a threshold voltage mismatch phenomenon between transistors in a sense amplifier is generated. Such a loading mismatch phenomenon or threshold voltage mismatch phenomenon may cause a sensing efficiency, such as a sensing margin and a sensing speed, of the sensing amplifier to deteriorate.
In order to increase the sensing efficiency of the sensing amplifier, a switch device may be connected to MOS transistors forming cross-coupled inverters. However, in this case, an area occupied by the sense amplifier is increased due to the switch device, whereas a cell area of a semiconductor memory device is decreased. Further, if the switch device is additionally disposed while preventing the decrease in the cell area, it is difficult to obtain a process margin, and thus a contact pattern may have defects.